1. Field of the Invention
The present invention relates to low dropout regulators (LDO regulators).
2. Description of the Related Art
A LDO regulator is a common solution for power management of portable electronic devices (such as a mobile phone, personal digital assistant, digital camera, or notebook).
FIG. 1 depicts an embodiment of a conventional LDO regulator. The LDO regulator 100 comprises a power transistor Mp, a current-voltage converting circuit 102, an error amplifier 104, and a capacitor Cout coupled to the output terminal of the LDO regulator 100. The power transistor Mp of the LDO regulator 100 has a power terminal (for example, a source of the transistor Mp), which receives an input voltage Vin that is activated by an input voltage Vin and controlled according to the state of the control terminal (gate) of the power transistor Mp. A current is generated at the output terminal (drain) of the power transistor Mp. A portion of the current is sent to the current-voltage converting circuit 102 to be converted to an output voltage Vout to drive a load 110. The output voltage Vout may be divided to a feedback voltage Vfb to be transmitted to the error amplifier 104 to be compared with a reference voltage Vref. The output of the error amplifier 104 controls the voltage level of a control terminal (gate) of the power transistor Mp to maintain the value of the output voltage Vout.
However, the value of the output voltage Vout may be affected by a load current Iload of the load 110. FIG. 2 shows the waveforms of the load current Iload and the output voltage Vout. As shown, the output voltage Vout may vibrate (an undershoot 202 or an overshoot 204) according to variations at the load current Iload. In the circuit of FIG. 1, the capacitor Cout is designed to ensure the stability of the close-loop control of FIG. 1. Thus, the capacitor Cout should be large-sized, so that the vibrations of the undershoot 202 and the overshoot 204 are limited within an acceptable region. However, circuit area for a large-sized capacitor Cout is large. For power management of a chip, the capacitor Cout has to be designed as an external capacitor which is outside of the chip, while the other components of the LDO regulator may be designed within the chip. Thus, an additional pad is required for the external capacitor (Cout), which increases chip costs.